MPW Design Rules


On this page you will find all of the technical information and design rules relating to our MPW service. If your requirements differ from our MPW service offerings, we can also provide bespoke fabrication runs. Contact This email address is being protected from spambots. You need JavaScript enabled to view it. for a quote.


LIVE: Ninth Call Design Rules

CORNERSTONE users are invited to submit designs to the ninth call. The platform is 500 nm Si / 3 µm buried oxide (BOX) silicon-on-insulator (SOI). There will be 2 silicon etches with etch depths of 160 nm (grating couplers) and 300 nm (rib waveguides). There will be a 1 µm thick top cladding silicon dioxide layer. 

Once again, a process design kit (PDK) has been made available using Luceda’s IPKISS software, subject to purchasing the appropriate license. To obtain a copy of the software and a license key, please contact Luceda by sending an email to This email address is being protected from spambots. You need JavaScript enabled to view it., specifying that you require a license for CORNERSTONE PDK usage. Of course, the CORNERSTONE PDK is free of charge if you already have a valid IPKISS license.  

Access to this run is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run with the following cost options:

Design area: 11.47 mm x 4.9 mm = £5,000.

Design area: 5.5 mm x 4.9 mm = £3,500.

The mask submission deadline is Friday 30th November 2018.

For more information, full design rules and quick reference design rules, please download the CORNERSTONE 9th Call Design Rules documents and the .GDSII template files.

For any queries, including questions on bespoke processing i.e. custom etch depths etc., please contact This email address is being protected from spambots. You need JavaScript enabled to view it.


Archive: Eighth Call Design Rules (220 nm SOI passive devices)

The design rules for the eighth call can be downloaded below, for your reference.


 

Archive: Seventh Call Design Rules (340 nm SOI passive devices with high resolution layer)

The design rules for the seventh call can be downloaded below, for your reference.


Archive: Sixth Call Design Rules (220 nm SOI passive devices with heaters)

The design rules for the sixth call can be downloaded below, for your reference.


Archive: Fifth Call Design Rules (340 nm SOI passive devices)

The design rules for the fifth call can be downloaded below, for your reference.


Archive: Fourth Call Design Rules (220 nm SOI active devices)

 The design rules for the fourth call can be downloaded below, for your reference.


 Archive: Third Call Design Rules (500 nm SOI passive devices)

 The design rules for the third call can be downloaded below, for your reference.


Archive: Second Call Design Rules (220 nm SOI passives devices with heaters)

 The design rules for the second call can be downloaded below, for your reference.


Archive: Second Call Training Slides

The CORNERSTONE project has published some training slides for those who would like more assistance with the design rules, and those who are new to mask design, and silicon photonics fabrication. The slides can be downloaded here


Archive: First Call Design Rules (220 nm SOI passive devices)

The design rules from the CORNERSTONE first call are available here for your reference. Samples were shipped on 8th May 2017, to arrive before the 10th May 2017 deadline.