CORNERSTONE Multi Project Wafer Runs 10 & 11 Announced

The design rules for CORNERSTONE multi project wafer (MPW) runs 10 & 11 on the 220 nm Si / 2 µm BOX SOI platform have been announced.

MPW #10 is a passive devices with heaters call; MPW #11 is an active device call.

For these calls there are major changes to the design submission process to align with the introduction of the CORNERSTONE terms and conditions:

All design submissions, even those that are supported by EPSRC funding, must agree with the terms and conditions. Under no circumstances will we accept designs without agreement with the terms.

Therefore, we strongly recommend that the terms and conditions are pre-authorised by your institution prior to the mask submission date.

In order to be eligible to submit a design you must first notify us of your intention to submit a design using the online form found using the link below. This is in order to enable us to prepare the necessary paperwork and plan the fabrication process effectively. The deadline for the notification of intention to submit is Friday 18th January 2019.

www.cornerstone.sotonfab.co.uk/work-with-us/intention-to-submit-form

Under no circumstances will we accept any design submissions for which we have not received prior notification of intention to submit a design.

After completing the intention to submit online form, when you are ready to submit your mask design on or before Friday 1st March 2019, follow the link below to the CORNERSTONE website mask submission page:

www.cornerstone.sotonfab.co.uk/work-with-us/mask-submission-form

Where applicable, any purchase orders must be uploaded to this form. Purchase orders will not be accepted via email.

A process design kit (PDK) has been made available using Luceda’s IPKISS software, subject to purchasing the appropriate license. To obtain a copy of the software and a license key, please contact Luceda by sending an email to This email address is being protected from spambots. You need JavaScript enabled to view it., specifying that you require a license for CORNERSTONE PDK usage. Of course, the CORNERSTONE PDK is free of charge if you already have a valid IPKISS license.  

Access to these runs is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run with the following cost options:

MPW #10: Design area: 11.47 mm x 4.9 mm = £10,000; Design area: 5.5 mm x 4.9 mm = £7,000.

MPW #11: Design area: 11.47 mm x 4.9 mm = £35,000; Design area: 5.5 mm x 4.9 mm = £20,000.

The full design rules and .gds mask templates can be on the Design Rules page.

The mask submission deadline for both calls is Friday 1st March 2019.

For more information on future calls, visit the Schedule & Cost page.

October 2018: Silicon Photonics Enlighten Conference @ PHOTONEX EUROPE

Dr Callum Littlejohns, conference co-chair and CORNERSTONE team member, together with the event sponsors, invite you to attend the 2nd silicon photonics Enlighten conference at the PHOTONEX EUROPE exhibition on Wednesday 10th October 2018.

The aim of the conference, entitled "Industry & Academia: Working Together in Silicon Photonics", is to bring together members of both the academic and industrial communities to consider ways to work more effectively together in mutually beneficial collaborations.

Professor Graham Reed will be presenting a talk entitled "Rapid prototyping using the CORNERSTONE platform" at 11:10.

In addition, the Optoelectronics Research Centre invites you for complementary drinks at their exhibition stand after the speaker programme finishes at 16:30. One lucky winner will receive a £50 Amazon gift voucher. Just drop your business card into the entry box for your chance to win. All entrants agree to be added to the CORNERSTONE mailing list.

Registration for the event is free. Please visit: https://xmark18.reg.buzz

More information, including the full programme, can be found on the PHOTONEX website: www.photonex.org/conference/silicon-photonics.html

September 2018: University of Southampton Industry Day

CORNERSTONE will be represented at the University of Southampton Future Photonics Hub Industry day on 20th September 2018.

In addition to the exhibition stand, where you will be able to meet members of the CORNERSTONE team, Professor Graham Reed will be giving a talk about the CORNERSTONE project as part of the invited speakers program.

For more information, and to register for your free delegate pass, visit the Optoelectronics Research Centre website:

www.orc.soton.ac.uk/events

CORNERSTONE Multi Project Wafer Run 9 Announced

The design rules for CORNERSTONE multi project wafer (MPW) run 9 on the 500 nm Si / 3 µm BOX SOI platform have been announced. We will offer 2 Si etch processes: 1) a shallow Si etch of 160 nm (grating couplers), and 2) a partial Si etch of 300 nm (rib waveguides). We will also offer a 1 µm thick silicon dioxide top cladding layer.

Once again, a process design kit (PDK) has been made available using Luceda’s IPKISS software, subject to purchasing the appropriate license. To obtain a copy of the software and a license key, please contact Luceda by sending an email to This email address is being protected from spambots. You need JavaScript enabled to view it., specifying that you require a license for CORNERSTONE PDK usage. Of course, the CORNERSTONE PDK is free of charge if you already have a valid IPKISS license.  

Access to this run is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run with the following cost options:

Design area: 11.47 mm x 4.9 mm = £5,000.

Design area: 5.5 mm x 4.9 mm = £3,500.

The full design rules and .gds mask template can be found here.

The mask submission deadline is Friday 30th November 2018.

For more information on future calls, visit the Schedule & Cost page.

CORNERSTONE Multi Project Wafer Run 8 Announced

The design rules for CORNERSTONE multi project wafer (MPW) run 8 on the 220 nm Si / 2 µm BOX SOI platform have been announced. We will offer 2 Si etch processes: 1) a shallow Si etch of 70 nm (grating couplers), and 2) a partial Si etch of 120 nm (rib waveguides). We will also offer a 1 µm thick silicon dioxide top cladding layer.

This call is intended as a test bed for the next active device call on this platform, later in the year.

Once again, a process design kit (PDK) has been made available using Luceda’s IPKISS software, subject to purchasing the appropriate license. To obtain a copy of the software and a license key, please contact Luceda by sending an email to This email address is being protected from spambots. You need JavaScript enabled to view it., specifying that you require a license for CORNERSTONE PDK usage. Of course, the CORNERSTONE PDK is free of charge if you already have a valid IPKISS license.  

Access to this run is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run with the following cost options:

Design area: 11.47 mm x 4.9 mm = £5,000.

Design area: 5.5 mm x 4.9 mm = £3,500.

The mask submission deadline is Friday 31st August 2018.

For more information on future calls, visit the Schedule & Cost page.

April 2018: Visit the CORNERSTONE Stand at PIC International Conference

We invite you to visit us at the CORNERSTONE exhibition stand at the upcoming PIC International Conference in Brussels, Belgium on 10-11 April. One lucky guest will be given the opportunity to access an upcoming “Passives with Heaters” call for FREE. To enter the free draw, place your business card in the bowl at our exhibition stand. By doing so, you will also be kept up to date with all future CORNERSTONE MPW calls.

In addition, Professor Graham Reed will be giving a talk at 11:05 on Wednesday 11th April to give more information on the CORNERSTONE project.

The PIC website contains more information: www.picinternational.net