CORNERSTONE users are invited to submit designs to the twelfth call. The platform is 340 nm Si / 2 µm buried oxide (BOX) silicon-on-insulator (SOI).
Access to this run is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run with the following cost options:
Design area: 11.47 mm x 4.9 mm = £10,000.
Design area: 5.5 mm x 4.9 mm = £7,000.
The sign-up deadline is Friday 15th March 2019. The mask submission deadline is Friday 26th April 2019.
For more information, full design rules and quick reference design rules, please download the CORNERSTONE 12th Call Design Rules documents and the .GDSII template files.
In order to help you ensure that you comply with the design rules, you can also download a design rule check (DRC) checklist and if you have access to Tanner L-Edit software, a .tdb version of the template containing a DRC file that you can run to automatically find any design rule violations (note that the automatic DRC will not check all of the design rules, so it remains very important to read the design rules in detail).