The route to scalable, error-free silicon photonics: Professor Frederic Gardes Authors Blog Post for Computer Weekly

For silicon photonics to scale across modern AI and data centre infrastructure, it must behave like a standard mass-produced chip. Light can move data faster than electrons, but making photonic systems ‘boring’ enough for reliable, high-volume deployment without constant recalibration remains the real challenge.

In this guest blog for Computer Weekly, Frederic Gardes, co-investigator at CORNERSTONE and head of the Integrated Photonics Group at the Optoelectronics Research Centre, explores what it will take to make silicon photonics truly scalable. From monolithic integration to wafer-level correction techniques, he outlines the advances needed to move photonics from specialist applications into mainstream AI and data centre deployment. 

The target, as I see it, is a 100x improvement in the energy efficiency of large data centre operations.

Professor Frederic Gardes,  Co-Investigator of CORNERSTONE

To read the blog post, visit – Computer Weekly